Messages in this thread | | | From | "Wang, Yalin" <> | Date | Thu, 30 May 2013 09:41:42 +0800 | Subject | RE: A bug about system call on ARM |
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Hi Will,
Have you received the log files?
And is there someone looking at this issue now ? This issue happened on Qcom Scorpoin CPUs, And it just happened in our stability test occasionally .
If you have some patch for this issue, I can do the test for it .
Thanks for your help very much !
-----Original Message----- From: Wang, Yalin Sent: Wednesday, May 29, 2013 5:51 PM To: 'Will Deacon'; richard -rw- weinberger Cc: linux-arch@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org Subject: RE: A bug about system call on ARM
Hi
This is kernel.log and the stack which is recovered by Trace32 tools. Please have a look at it .
Thanks
-----Original Message----- From: Will Deacon [mailto:will.deacon@arm.com] Sent: Wednesday, May 29, 2013 5:48 PM To: richard -rw- weinberger Cc: Wang, Yalin; linux-arch@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org Subject: Re: A bug about system call on ARM
Hello,
On Wed, May 29, 2013 at 09:46:42AM +0100, richard -rw- weinberger wrote: > On Wed, May 29, 2013 at 10:24 AM, Wang, Yalin <Yalin.Wang@sonymobile.com> wrote: > > I have download the latest linux kernel code 3.9.4 And Compare with > > 3.4.0 kernel . > > > > It seems there is no change for this part , So it will still happen > > . > > Does anyone know who is responsible for arm arch part kernel code ? > > See MAINTAINERS file. > CC'ing linux-arm-kernel@lists.infradead.org
Cheers for adding us to CC.
> >> #ifdef CONFIG_ARM_THUMB > >> tst r8, #PSR_T_BIT > >> movne r10, #0 @ no thumb OABI emulation > >> ldreq r10, [lr, #-4] @ get SWI instruction // crash at this instruction, when get SWI instruction
Do you have the panic log please? Also, which SoC are you using and how are you reproducing this?
> >> ldr r10, [lr, #-4] @ get SWI instruction > >> A710( and ip, r10, #0x0f000000 @ check for SWI ) > >> A710( teq ip, #0x0f000000 ) > >> A710( bne .Larm710bug ) > >> #endif > >> #ifdef CONFIG_CPU_ENDIAN_BE8 > >> rev r10, r10 @ little endian instruction > >> #endif > >> > >> /****************************************************************** > >> *** > >> ******************************/ > >> > >> Then reason why it will crash when get SWI instruction is maybe > >> This page is clear to aged by kernel, But this MMU fault happpened > >> in kernel, So the kernel do_page_fault function will not clear this > >> page to young, So that will crash .
Sounds like we might need some USER annotations around the instruction loads, but we should also rework the code so that we re-enable interrupts first.
Will
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