Messages in this thread | | | Date | Tue, 9 Apr 2013 11:25:41 +0200 | Subject | Re: [PATCH] clk: si5351: Add gapless tuning for SI5351 PLL | From | Sebastian Hesselbarth <> |
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On Tue, Apr 9, 2013 at 10:26 AM, Michal Bachraty <michal.bachraty@streamunlimited.com> wrote: > For gapless tuning, there is no need for PLL reset and clkout power-down > when tuning output. "silabs,gapless-tuning" parameter enables gapless tuning > for specific clock output.
Michal,
does gapless tuning have any constraints? Can we use it for all rate changes or determine the need for pll reset by rate offset?
Sebastian
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