Messages in this thread | | | Date | Mon, 08 Apr 2013 15:24:49 -0400 (EDT) | Subject | Re: [PATCH] sparc: Use generic idle loop | From | David Miller <> |
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From: Sam Ravnborg <sam@ravnborg.org> Date: Mon, 8 Apr 2013 19:10:35 +0200
> I think not. > local_irq_disable writes 0 to the PIL register, > whereas the above code set the IE (Interrupt enable) bit to 0. > > So the implementations differs - and I think there is a good > reason for being so. > > But this is the part where I refer to that I am fooling around > in code that I do not understand. > I re-checked the SPARC V9 manual - but I did not within a few minutes > reading understand what is the difference between the twoo.
Device interrupts arrive first as high-priority interrupt packets that are serviced by traps which are enabled only if PSTATE.IE is set.
These trap handlers reschedule the interrupt quickly into a PIL levelled interrupt, whose delivery is covered by (%pil & PSTATE.IE)
The sun4v sleeping code requires that we have PSTATE.IE clear over the cpu sleep hypervisor call.
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