Messages in this thread | | | Date | Fri, 26 Apr 2013 08:30:59 -0700 | Subject | Re: [kernel-hardening] [PATCH 4/6] x86: kaslr: select random base offset | From | Kees Cook <> |
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On Thu, Apr 25, 2013 at 11:13 PM, Mathias Krause <minipli@googlemail.com> wrote: > On Thu, Apr 25, 2013 at 11:54 PM, Kees Cook <keescook@chromium.org> wrote: >> Select a random location when CONFIG_RANDOMIZE_BASE is used, bounded >> by CONFIG_RANDOMIZE_BASE_MAX_OFFSET. Sources of randomness currently >> include RDRAND and RDTSC. >> >> Signed-off-by: Kees Cook <keescook@chromium.org> >> --- >> arch/x86/Kconfig | 29 +++++++++++++-- >> arch/x86/boot/compressed/aslr.c | 75 +++++++++++++++++++++++++++++++++++++-- >> 2 files changed, 100 insertions(+), 4 deletions(-) >> >> [snip] >> >> diff --git a/arch/x86/boot/compressed/aslr.c b/arch/x86/boot/compressed/aslr.c >> index d5331ee..11a91c6 100644 >> --- a/arch/x86/boot/compressed/aslr.c >> +++ b/arch/x86/boot/compressed/aslr.c >> @@ -2,18 +2,89 @@ >> >> #ifdef CONFIG_RANDOMIZE_BASE >> >> +#include <asm/archrandom.h> >> +static inline int rdrand(unsigned long *v) >> +{ >> + int ok; >> + asm volatile("1: " RDRAND_LONG "\n\t" >> + "jc 2f\n\t" >> + "decl %0\n\t" >> + "jnz 1b\n\t" >> + "2:" >> + : "=r" (ok), "=a" (*v) >> + : "0" (RDRAND_RETRY_LOOPS)); >> + return ok; >> +} >> + >> +static inline uint32_t rdtsc(void) >> +{ >> + uint32_t timer; >> + >> + asm volatile("rdtsc\n" : "=a" (timer)); > > '\n' in the assembly statement is not needed. Also, RDTSC trashes > edx/rdx as well so it should be mentioned in the clobber list, at > least. > Maybe using rdtscl() from <asm/msr.h> instead is an option?
Ah yeah, rdtscl is perfect. I'll use that instead.
Thanks!
-Kees
-- Kees Cook Chrome OS Security
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