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    Subject[PATCH 61/88] ARM: 7657/1: head: fix swapper and idmap population with LPAE and big-endian
    Date
    3.5.7.8 -stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Will Deacon <will.deacon@arm.com>

    commit d61947a164760ac520cb416768afdf38c33d60e7 upstream.

    The LPAE page table format uses 64-bit descriptors, so we need to take
    endianness into account when populating the swapper and idmap tables
    during early initialisation.

    This patch ensures that we store the two words making up each page table
    entry in the correct order when running big-endian.

    Acked-by: Catalin Marinas <catalin.marinas@arm.com>
    Tested-by: Marc Zyngier <marc.zyngier@arm.com>
    Signed-off-by: Will Deacon <will.deacon@arm.com>
    Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
    Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
    ---
    arch/arm/kernel/head.S | 26 ++++++++++++++++++++++----
    1 file changed, 22 insertions(+), 4 deletions(-)

    diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
    index 458b8d3..f47f770 100644
    --- a/arch/arm/kernel/head.S
    +++ b/arch/arm/kernel/head.S
    @@ -188,13 +188,22 @@ __create_page_tables:
    orr r3, r3, #3 @ PGD block type
    mov r6, #4 @ PTRS_PER_PGD
    mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER
    -1: str r3, [r0], #4 @ set bottom PGD entry bits
    +1:
    +#ifdef CONFIG_CPU_ENDIAN_BE8
    str r7, [r0], #4 @ set top PGD entry bits
    + str r3, [r0], #4 @ set bottom PGD entry bits
    +#else
    + str r3, [r0], #4 @ set bottom PGD entry bits
    + str r7, [r0], #4 @ set top PGD entry bits
    +#endif
    add r3, r3, #0x1000 @ next PMD table
    subs r6, r6, #1
    bne 1b

    add r4, r4, #0x1000 @ point to the PMD tables
    +#ifdef CONFIG_CPU_ENDIAN_BE8
    + add r4, r4, #4 @ we only write the bottom word
    +#endif
    #endif

    ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
    @@ -267,6 +276,11 @@ __create_page_tables:
    add r6, r6, #1 << SECTION_SHIFT
    str r6, [r3]

    +#if defined(CONFIG_LPAE) && defined(CONFIG_CPU_ENDIAN_BE8)
    + sub r4, r4, #4 @ Fixup page table pointer
    + @ for 64-bit descriptors
    +#endif
    +
    #ifdef CONFIG_DEBUG_LL
    #if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING)
    /*
    @@ -285,13 +299,17 @@ __create_page_tables:
    orr r3, r7, r3, lsl #SECTION_SHIFT
    #ifdef CONFIG_ARM_LPAE
    mov r7, #1 << (54 - 32) @ XN
    +#ifdef CONFIG_CPU_ENDIAN_BE8
    + str r7, [r0], #4
    + str r3, [r0], #4
    #else
    - orr r3, r3, #PMD_SECT_XN
    -#endif
    str r3, [r0], #4
    -#ifdef CONFIG_ARM_LPAE
    str r7, [r0], #4
    #endif
    +#else
    + orr r3, r3, #PMD_SECT_XN
    + str r3, [r0], #4
    +#endif

    #else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */
    /* we don't need any serial debugging mappings */
    --
    1.8.1.2


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