Messages in this thread | | | Subject | Re: [PATCH] drivers/block/xsysace - replace in(out)_8/in(out)_be16/in(out)_le16 with generic iowrite(read)8/16(be) | From | Benjamin Herrenschmidt <> | Date | Tue, 05 Feb 2013 23:19:16 +1100 |
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On Tue, 2013-02-05 at 11:54 +0100, Michal Simek wrote: > > xilinx ppc is big endian > xilinx arm is little endian > xilinx microblaze is little endian and big endian
You are talking about the core, why should the xsysace block driver be synthesized with the same endianness as the core ? That's not terribly useful, especially since reverse load/stores on ppc are essentially free...
> It is just sharing the same IP across all platforms. Which is better > than create new devices and new device drivers for it. It means that > all of them are register compatible but require access with native > platform endianness as I listed above.
Every attempt at doing "native platform endianness" has always been a misguided attempt turning into a trainwreck (see OHCI USB).
Just pick one endian for the device and stick to it.
> It is not a problem to create runtime wrapper and even detect endian > directly in the driver > but the point if this is the proper design. > Also ioread32 and ioread32be shouldn't be used on ARM because there > are missing memory barriers.
Then fix them, they shouldn't be, it's a bug, it will break many other drivers. They should be fully equivalent to readl.
Ben.
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