Messages in this thread | | | Date | Sat, 2 Feb 2013 16:16:06 +0100 | Subject | Re: [PATCH] gpio: Add device driver for GRGPIO cores | From | Linus Walleij <> |
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On Wed, Jan 30, 2013 at 1:28 PM, Andreas Larsson <andreas@gaisler.com> wrote:
> This driver supports GRGPIO gpio cores available in the GRLIB VHDL IP core > library. > > Signed-off-by: Andreas Larsson <andreas@gaisler.com>
OK...
> +#if defined(__BIG_ENDIAN) > +static inline u32 grgpio_read_reg(u32 __iomem *reg) > +{ > + return ioread32be(reg); > +} > + > +static inline void grgpio_write_reg(u32 __iomem *reg, u32 val) > +{ > + iowrite32be(val, reg); > +} > +#else > +static inline u32 grgpio_read_reg(u32 __iomem *reg) > +{ > + return ioread32(reg); > +} > + > +static inline void grgpio_write_reg(u32 __iomem *reg, u32 val) > +{ > + iowrite32(val, reg); > +} > +#endif
Where is this __BIG_ENDIAN flag coming from?
And do you really have and test this regularly on both LE and BE hardware? I am worrying a bit about maintenance...
> +static void grgpio_set_sbit(struct grgpio_priv *priv, u32 __iomem *reg, > + unsigned offset, int val, u32 *shadow) > +{ > + unsigned long flags; > + > + spin_lock_irqsave(&priv->lock, flags); > + > + if (val) > + *shadow |= (1 << offset); > + else > + *shadow &= ~(1 << offset); > + grgpio_write_reg(reg, *shadow); > + > + spin_unlock_irqrestore(&priv->lock, flags); > +}
This is all very basic stuff. Please make a best effort to reuse or augment and reuse this: drivers/gpio/gpio-generic.c
IIRC this one also handles endianness issues, but I could be wrong.
Yours, Linus Walleij
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