Messages in this thread Patch in this message | | | Date | Tue, 12 Feb 2013 18:02:58 +0100 | Subject | Re: [PATCH] drivers/block/xsysace - replace in(out)_8/in(out)_be16/in(out)_le16 with generic iowrite(read)8/16(be) | From | Michal Simek <> |
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2013/2/7 Grant Likely <grant.likely@secretlab.ca>: > On Thu, Feb 7, 2013 at 3:12 PM, Alexey Brodkin > <Alexey.Brodkin@synopsys.com> wrote: >> On 02/07/2013 06:51 PM, Grant Likely wrote: >>> >>> On Thu, Feb 7, 2013 at 2:39 PM, Grant Likely <grant.likely@secretlab.ca> >>> wrote: >>>> >>>> On Wed, Feb 6, 2013 at 9:35 PM, Benjamin Herrenschmidt >>>> <benh@kernel.crashing.org> wrote: >>>>>> >>>>>> In fact, the driver already knows about this and figures >>>>>> out at runtime how the device is wired up to the bus. This is not the >>>>>> problem. >>>>> >>>>> >>>>> Except that this is very gross, especially when you observe that in the >>>>> busted "big endian" case, it has to byteswap the bloody data port. >>>>> >>>>> So you end up having to do that gross hack with separate accessors for >>>>> registers vs. data and not able to use the _rep variants, which also >>>>> means that on platforms like ppc, you end up with a memory barrier on >>>>> every access (or more), which is going to slow things down enormously. >>>> >>>> >>>> I don't see why the _rep variants aren't usable here. The only reason >>>> I didn't use them when I wrote the driver in the first place was I was >>>> a n00b kernel hacker and I didn't know they were there. >>> >>> >>> The 8-bit variant is different though because the hardware requires >>> pingponging between odd and even byte addresses to flush the fifo. >>> Reading a data port even address (0x40) gives the least significant >>> byte. Reading from an odd address (0x41) give the MSB and pops the >>> data off the FIFO. So, yes, the _rep variant can't be used in 8-bit >>> mode. It should still be fine in 16-bit. >>> >>> page 45: http://www.xilinx.com/support/documentation/data_sheets/ds080.pdf >>> >> >> Ok, so may I do a re-spin with these changes: > > There are two things here. 1) changing the accessors used. 2) > switching the endianess as a bug fix. Any changes to the endian access > should be a separate patch which a description of what is needed. > >> 1. In "ace_in_be16" use "ioread16be" >> 2. In "ace_out_be16" use "iowrite16be" >> 3. In "ace_in_le16" use "ioread16" >> 4. In "ace_out_le16" use "iowrite16" > > Yes > >> 5. In "ace_datain_le16" use "ioread16_rep" >> 6. In "ace_dataout_le16" use "iowrite16_rep" > > Maybe. In a separate patch. Hmmm... I guess there isn't an > ioread16be_rep variant. Oh well. Check first with Michal on LE > microblaze before making the change. If it doesn't work for him the > more understanding is needed. I was pretty sure the LE variant already > worked.
Sorry it took me some time to get 16bit LE to work for test but here are test results.
I have tested it on ppc BE, Microblaze BE and Microblaze LE systems and surprisingly on all of them only ace_reg_le16_ops are used.
But on Microblaze LE is necessary to use different datain/out_le16 functions as below which are also not compatible with Microblaze and PPC BE.
diff --git a/drivers/block/xsysace.c b/drivers/block/xsysace.c index bbad046..8dd192c 100644 --- a/drivers/block/xsysace.c +++ b/drivers/block/xsysace.c @@ -314,7 +314,7 @@ static void ace_datain_le16(struct ace_device *ace) int i = ACE_FIFO_SIZE / 2; u16 *dst = ace->data_ptr; while (i--) - *dst++ = ioread16be(ace->baseaddr + 0x40); + *dst++ = ioread16(ace->baseaddr + 0x40); ace->data_ptr = dst; }
@@ -323,7 +323,7 @@ static void ace_dataout_le16(struct ace_device *ace) int i = ACE_FIFO_SIZE / 2; u16 *src = ace->data_ptr; while (i--) - iowrite16be(*src++, ace->baseaddr + 0x40); + iowrite16(*src++, ace->baseaddr + 0x40); ace->data_ptr = src; }
Grant: How did you tested BE mode? It is fpga it means you can switch some connections and it could work. Thanks, Michal
-- Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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