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SubjectRe: [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge
On Sat, Dec 14, 2013 at 03:19:02PM +0100, Peter Zijlstra wrote:
> On Fri, Dec 13, 2013 at 10:11:05AM +0800, Alex Shi wrote:
> > BTW,
> > A bewitching idea is till attracting me.
> > https://lkml.org/lkml/2012/5/23/148
> > Even it was sentenced to death by HPA.
> > https://lkml.org/lkml/2012/5/24/143
> >
> > That is that just flush one of thread TLB is enough for SMT/HT, seems
> > TLB is still shared in core on Intel CPU. This benefit is unconditional,
> > and if my memory right, Kbuild testing can improve about 1~2% in average
> > level.
> >
> > So could you like to accept some ugly quirks to do this lazy TLB flush
> > on known working CPU?
> > Forgive me if it's stupid.
>
> I think there's a further problem with that patch -- aside of it being
> right from a hardware point of view.
>
> We currently rely on the tlb flush IPI to synchronize with lockless page
> table walkers like gup_fast().
>
> By not sending an IPI to all CPUs you can get into trouble and crash the
> kernel.
>
> We absolutely must keep sending the IPI to all relevant CPUs, we can
> choose not to actually do the flush on some CPUs, but we must keep
> sending the IPI.

The alternative is switching x86 over to use HAVE_RCU_TABLE_FREE.


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