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Subject[PATCHv7 00/12] Unifying SMMU driver among Tegra SoCs

This series provide:

(0) IOMMU standard DT binding("iommus")
(1) Unified IOMMU(SMMU) driver among Tegra SoCs
(2) Multiple Address Space support(MASID) in IOMMU(SMMMU)
(3) Tegra IOMMU'able devices, most of platform devices are IOMMU'able.

There's been some discussion[1] about device population order. Some
devices needs to be populated earlier than other devices regardless of
their bus topology. For the solution I implemented an IOMMU hook in
driver core:

[PATCHv7 04/13] driver/core: populate devices in order for IOMMUs

which is based on:

The main problem here is,

IOMMU devices on the bus need to be poplulated first, then iommu
master devices are done later.

With CONFIG_OF_IOMMU, "iommus=" DT binding would be used to identify
whether a device can be an iommu msater or not. If a device can, we'll
defer to populate that device till an iommu device is populated. Then,
those defered iommu master devices are populated and configured with
help of the already populated iommu device via a new IOMMU API

This "iommus=" binding is expected used as the global/standard binding.

Tested IOMMU functionality with T30 SD/MMC. Any further testing with
T114 and/or other devices would be really appreciated.

Minior fixes.

Use "iommus=" DT bindings as a standard IOMMU binding.

Add a hook in driver core to control device populatin order.
Introduced arm,smmu "mmu-master" binding instead of tegra own.
Removed DT patches from this series.

Updated based on Stephen Warren's feedback

Updated based on Thierry Reding's and Stephen Warren's feedback


Available in the git repository at:

git:// smmu-upstreaming@20131212

Hiroshi Doyu (12):
of: introduce of_property_for_each_phandle_with_args()
iommu/of: introduce a global iommu device list
iommu/of: check if dependee iommu is ready or not
driver/core: populate devices in order for IOMMUs
iommu/core: add ops->{bound,unbind}_driver()
ARM: tegra: create a DT header defining SWGROUP ID
iommu/tegra: smmu: register device to iommu dynamically
iommu/tegra: smmu: calculate ASID register offset by ID
iommu/tegra: smmu: get swgroups from DT "iommus="
iommu/tegra: smmu: allow duplicate ASID wirte
iommu/tegra: smmu: Rename hwgrp -> swgroups
iommu/tegra: smmu: add SMMU to an global iommu list

.../bindings/iommu/nvidia,tegra30-smmu.txt | 30 +-
drivers/base/dd.c | 5 +
drivers/iommu/Kconfig | 1 +
drivers/iommu/iommu.c | 13 +-
drivers/iommu/of_iommu.c | 51 +++
drivers/iommu/tegra-smmu.c | 383 +++++++++++++--------
drivers/of/base.c | 46 +++
include/dt-bindings/memory/tegra-swgroup.h | 50 +++
include/linux/iommu.h | 4 +
include/linux/of.h | 32 ++
include/linux/of_iommu.h | 22 ++
11 files changed, 487 insertions(+), 150 deletions(-)
create mode 100644 include/dt-bindings/memory/tegra-swgroup.h


"[RFC] early init and DT platform devices allocation/registration"
"Report from 2013 ARM kernel summit"
"[RFC PATCH] Documentation: devicetree: add description for generic bus properties"

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