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SubjectRe: [tip:perf/core] tools/perf: Add required memory barriers
On Wed, Nov 06, 2013 at 03:44:56PM +0100, Peter Zijlstra wrote:
> long head = ((__atomic long)pc->data_head).load(memory_order_acquire);
>
> coupled with:
>
> ((__atomic long)pc->data_tail).store(tail, memory_order_release);
>
> might be the 'right' and proper C11 incantations to avoid having to
> touch kernel macros; but would obviously require a recent compiler.
>
> Barring that, I think we're stuck with:
>
> long head = ACCESS_ONCE(pc->data_head);
> smp_rmb();
>
> ...
>
> smp_mb();
> pc->data_tail = tail;
>
> And using the right asm goo for the barriers. That said, all these asm
> barriers should include a compiler barriers (memory clobber) which
> _should_ avoid the worst compiler trickery -- although I don't think it
> completely obviates the need for ACCESS_ONCE() -- uncertain there.

http://software.intel.com/en-us/articles/single-producer-single-consumer-queue/

There's one for icc on x86.


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