Messages in this thread | | | Date | Fri, 29 Nov 2013 19:28:12 +0100 | From | Michael Grzeschik <> | Subject | Re: [PATCH 2/3 v2] usb: chipidea: Fix Internal error: : 808 [#1] ARM related to STS flag |
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On Fri, Nov 29, 2013 at 03:19:45PM +0800, Chris Ruehl wrote: > usb: chipidea: Fix Internal error: : 808 [#1] ARM related to STS flag > > * init the sts flag to 0 (missed) > * set the sts flag only if not 0 > > Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk> > --- > drivers/usb/chipidea/core.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c > index 5075407..1a6010e 100644 > --- a/drivers/usb/chipidea/core.c > +++ b/drivers/usb/chipidea/core.c > @@ -245,6 +245,8 @@ static void hw_phymode_configure(struct ci_hdrc *ci) > { > u32 portsc, lpm, sts = 0; > > switch (ci->platdata->phy_mode) { > case USBPHY_INTERFACE_MODE_UTMI: > portsc = PORTSC_PTS(PTS_UTMI); > @@ -273,10 +275,12 @@ static void hw_phymode_configure(struct ci_hdrc *ci) > > if (ci->hw_bank.lpm) { > hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm); > - hw_write(ci, OP_DEVLC, DEVLC_STS, sts); > + if (sts) > + hw_write(ci, OP_DEVLC, DEVLC_STS, sts); > } else { > hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc); > - hw_write(ci, OP_PORTSC, PORTSC_STS, sts); > + if ( sts ) > + hw_write(ci, OP_PORTSC, PORTSC_STS, sts);
The conditions coding style is broken.
> } > }
Still don't get why a system with ehci compliant PORTSC register should not want to have the sts bit _explicitly_ set to 0 if we don't use serial phy mode. So NACK!
Michael
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