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Subject[PATCH 3.10 19/80] PCI: Support PCIe Capability Slot registers only for ports with slots
3.10-stable review patch.  If anyone has any objections, please let me know.


From: Bjorn Helgaas <>

commit 6d3a1741f1e648cfbd5a0cc94477a0d5004c6f5e upstream.

Previously we allowed callers to access Slot Capabilities, Status, and
Control for Root Ports even if the Root Port did not implement a slot.
This seems dubious because the spec only requires these registers if a
slot is implemented.

It's true that even Root Ports without slots must have *space* for these
slot registers, because the Root Capabilities, Status, and Control
registers are after the slot registers in the capability. However,
for a v1 PCIe Capability, the *semantics* of the slot registers are
undefined unless a slot is implemented.

Signed-off-by: Bjorn Helgaas <>
Reviewed-By: Jiang Liu <>
Acked-by: Myron Stowe <>
Signed-off-by: Greg Kroah-Hartman <>

drivers/pci/access.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -497,9 +497,9 @@ static inline bool pcie_cap_has_sltctl(c
int type = pci_pcie_type(dev);

- return type == PCI_EXP_TYPE_ROOT_PORT ||
- pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT);
+ return (type == PCI_EXP_TYPE_ROOT_PORT ||
+ pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT;

static inline bool pcie_cap_has_rtctl(const struct pci_dev *dev)

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