Messages in this thread | | | Date | Tue, 26 Nov 2013 13:43:24 -0500 | Subject | Re: [PATCH v2] intel_idle: Fixed C6 state on Avoton/Rangeley processors | From | Len Brown <> |
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> .desc = "MWAIT 0x51", > - .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, > + .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, > .exit_latency = 15, > .target_residency = 45,
Thanks for noticing that .desc and .flags are inconsistent. This is my fault -- apparently I e-mailed a version of this patch that is older than what I have in my git tree.
No big issue, though, as 0x51 and 0x58 do exactly the same thing in AVN hardware. Indeed, changing .desc to 0x58 would be fine also.
Acked-by: Len Brown <len.brown@intel.com>
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