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SubjectRe: [PATCH 2/3] mfd: cros ec: spi: Increase EC transaction delay
On Mon, 18 Nov 2013, Thierry Reding wrote:

> From: Derek Basehore <dbasehore@chromium.org>
>
> 50 us is not a long enough delay between EC transactions. At least 70 us
> are needed for the 16 MHz STM32L part. Increase the delay to 200 us for
> an extra safety margin.
>
> Signed-off-by: Derek Basehore <dbasehore@chromium.org>
> Reviewed-by: Randall Spangler <rspangler@chromium.org>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> drivers/mfd/cros_ec_spi.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)

As I'm sure you've tested this and you didn't notice any new undue
latency, I'll apply the patch, thanks.

--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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