Messages in this thread |  | | Subject | Re: [PATCH 2/2] perf/x86/intel: Add Ivy Bridge-EP uncore IRP box support | From | Joe Perches <> | Date | Wed, 30 Oct 2013 22:47:28 -0700 |
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On Thu, 2013-10-31 at 13:36 +0800, Yan, Zheng wrote: > Unlike other uncore boxes, IRP boxes live in PCI buses with no UBOX > device. For PCI bus without UBOX device, we find the next bus that > has UBOX device and use its 'bus to socket' mapping. [] > diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c [] > @@ -997,6 +997,20 @@ static int snbep_pci2phy_map_init(int devid) [] > +/* registers in IRP boxes are not properly aligned */ > +static unsigned ivt_uncore_irp_ctls[] = {0xd8, 0xdc, 0xe0, 0xe4}; > +static unsigned ivt_uncore_irp_ctrs[] = {0xa0, 0xb0, 0xb8, 0xc0};
Using this sort of naming is like asking for a typo or a copy/paste defect.
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