Messages in this thread | | | Date | Fri, 11 Oct 2013 11:05:32 +0200 | From | Lennert Buytenhek <> | Subject | Re: [PATCH 3/8] ARM: l2x0: add Marvell Tauros3 compatible |
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On Wed, Oct 09, 2013 at 09:27:14PM +0200, Sebastian Hesselbarth wrote:
> >>>>>This add a compatible for the Marvell Tauros3 cache controller which > >>>>>is compatible with l2x0 cache controllers. While updating the binding > >>>>>documentation, clean up the list of possible compatibles. > >>>>> > >>>>>Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> > >>>>>--- > > Added Jisheng and Lennert to Cc. > > Lennert, while looking for differences between ARM PL310 and > Marvell Tauros3 cache controller in a GPL'ed 2.6 kernel source > from Asus, I found arch/arm/mm/cache-tauros3.c which states you > as the original author. If that is wrong, please ignore this.
I'm the original author of cache-tauros2.c, but I've never heard of Tauros3, and my name probably ended up in there via cp(1).
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