Messages in this thread | | | Subject | Re: [PATCH v3] lpc_ich: fix gpio base and control offsets | From | Paul Bolle <> | Date | Fri, 25 Jan 2013 11:04:35 +0100 |
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On Fri, 2013-01-25 at 10:47 +0100, Linus Walleij wrote: > On Thu, Jan 24, 2013 at 9:52 PM, Aaron Sierra <asierra@xes-inc.com> wrote: > > In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at > > offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to > > properly be enabled (and disabled) for these chipsets. > > > > Signed-off-by: Agócs Pál <agocs.pal.86@gmail.com> > > Signed-off-by: Aaron Sierra <asierra@xes-inc.com> > > OK... Paul, can you test this on your setup?
This seems to be the first time I'm added to this thread. I'm a bit lost here: why should I test this patch? This doesn't seem to be related to two older lpc_ich threads I was involved in (in November 2012). Not that I mind testing stuff, that's not the problem...
Paul Bolle
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