Messages in this thread | | | Date | Thu, 24 Jan 2013 21:00:34 +0100 | From | Borislav Petkov <> | Subject | Re: [PATCH V4] IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround |
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On Thu, Jan 24, 2013 at 01:17:53PM -0600, suravee.suthikulpanit@amd.com wrote: > From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> > > The IOMMU may stop processing page translations due to a perceived lack > of credits for writing upstream peripheral page service request (PPR) > or event logs. If the L2B miscellaneous clock gating feature is enabled > the IOMMU does not properly register credits after the log request has > completed, leading to a potential system hang. > > BIOSes are supposed to disable L2B micellaneous clock gating by setting > L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b. This > patch corrects that for those which do not enable this workaround. > > Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Acked-by: Borislav Petkov <bp@suse.de>
Thanks for the good work.
-- Regards/Gruss, Boris.
Sent from a fat crate under my desk. Formatting is fine. --
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