Messages in this thread | | | Date | Mon, 21 Jan 2013 02:27:29 -0500 | From | Chen Gong <> | Subject | Re: [RFC PATCH 1/5] x86: Add cpu capability flag X86_FEATURE_TSC_S3_NOTSTOP |
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On Mon, Jan 21, 2013 at 02:38:41PM +0800, Feng Tang wrote: > Date: Mon, 21 Jan 2013 14:38:41 +0800 > From: Feng Tang <feng.tang@intel.com> > To: Thomas Gleixner <tglx@linutronix.de>, John Stultz > <john.stultz@linaro.org>, Ingo Molnar <mingo@elte.hu>, "H. Peter Anvin" > <hpa@linux.intel.com>, x86@kernel.org, Len Brown <lenb@kernel.org>, > "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>, > linux-kernel@vger.kernel.org > Cc: Feng Tang <feng.tang@intel.com> > Subject: [RFC PATCH 1/5] x86: Add cpu capability flag > X86_FEATURE_TSC_S3_NOTSTOP > X-Mailer: git-send-email 1.7.9.5 > > On some new Intel Atom processors (Penwell and Cloverview), there is > a feature that the TSC won't stop S3, say the TSC value won't be > reset to 0 after resume. This feature makes TSC a more reliable > clocksource and could benefit the timekeeping code during system > suspend/resume cycle, so add a flag for it. > > Signed-off-by: Feng Tang <feng.tang@intel.com> > --- > arch/x86/include/asm/cpufeature.h | 1 + > arch/x86/kernel/cpu/intel.c | 12 ++++++++++++ > 2 files changed, 13 insertions(+) > > diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h > index 2d9075e..f7e1eac 100644 > --- a/arch/x86/include/asm/cpufeature.h > +++ b/arch/x86/include/asm/cpufeature.h > @@ -100,6 +100,7 @@ > #define X86_FEATURE_AMD_DCM (3*32+27) /* multi-node processor */ > #define X86_FEATURE_APERFMPERF (3*32+28) /* APERFMPERF */ > #define X86_FEATURE_EAGER_FPU (3*32+29) /* "eagerfpu" Non lazy FPU restore */ > +#define X86_FEATURE_TSC_S3_NOTSTOP (3*32+30) /* TSC doesn't stop in S3 state */ > We have an existed "TSC always running in C3+" feature and name it as X86_FEATURE_NONSTOP_TSC, so how about naming it with the same style, like X86_FEATURE_NONSTOP_TSC_S3?
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