Messages in this thread |  | | Date | Thu, 17 Jan 2013 14:40:58 +0100 | Subject | Re: [PATCH v2] lpc_ich: fix gpio base and control offsets | From | Linus Walleij <> |
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On Tue, Jan 15, 2013 at 9:42 PM, Aaron Sierra <asierra@xes-inc.com> wrote:
> In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at > offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to > properly be enabled (and disabled) for these chipsets. > > Signed-off-by: Agócs Pál <agocs.pal.86@gmail.com> > Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org> For the GPIO parts. I honestly know very little about PCI.
Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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