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SubjectRe: [PATCH v2] lpc_ich: fix gpio base and control offsets
On Tue, Jan 15, 2013 at 9:42 PM, Aaron Sierra <> wrote:

> In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
> offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
> properly be enabled (and disabled) for these chipsets.
> Signed-off-by: Agócs Pál <>
> Signed-off-by: Aaron Sierra <>

Acked-by: Linus Walleij <>
For the GPIO parts. I honestly know very little about PCI.

Linus Walleij
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