| From | Herton Ronaldo Krzesinski <> | Subject | [PATCH 005/222] ath9k_hw: Enable hw PLL power save for AR9462 | Date | Wed, 16 Jan 2013 13:53:25 -0200 |
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3.5.7.3 -stable review patch. If anyone has any objections, please let me know.
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From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
commit 1680260226a8fd2aab590319da83ad8e610da9bd upstream.
This reduced the power consumption to half in full and network sleep.
Cc: Paul Stewart <pstew@chromium.org> Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com> [ herton: backport for 3.5, PCIE_PLL_ON_CREQ_DIS_L1_2P0 macro corresponds to the ar9462_pciephy_pll_on_clkreq_disable_L1_2p0, INIT_INI_ARRAY macro still have rows and columns parameter ] Signed-off-by: Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com> --- drivers/net/wireless/ath/ath9k/ar9003_hw.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c index a0e3394..4f692b9 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c @@ -307,13 +307,13 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) /* Awake -> Sleep Setting */ INIT_INI_ARRAY(&ah->iniPcieSerdes, - PCIE_PLL_ON_CREQ_DIS_L1_2P0, - ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0), + ar9462_pciephy_clkreq_disable_L1_2p0, + ARRAY_SIZE(ar9462_pciephy_clkreq_disable_L1_2p0), 2); /* Sleep -> Awake Setting */ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, - PCIE_PLL_ON_CREQ_DIS_L1_2P0, - ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0), + ar9462_pciephy_clkreq_disable_L1_2p0, + ARRAY_SIZE(ar9462_pciephy_clkreq_disable_L1_2p0), 2); /* Fast clock modal settings */ -- 1.7.9.5
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