| From | Greg Kroah-Hartman <> | Subject | [ 120/171] drm/i915: dont pwrite tiled objects through the gtt | Date | Tue, 15 Jan 2013 14:44:45 -0800 |
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3.4-stable review patch. If anyone has any objections, please let me know.
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From: Daniel Vetter <daniel.vetter@ffwll.ch>
commit c07496fa61f4c5cb2addd1c57f6b22fcaeea2eeb upstream.
... we will botch up the bit17 swizzling. Furthermore tiled pwrite is a (now) unused slowpath, so no one really cares.
This fixes the last swizzling issues I have with i-g-t on my bit17 swizzling i915G. No regression, it's been broken since the dawn of gem, but it's nice for regression tracking when really _all_ i-g-t tests work.
Actually this is not true, Chris Wilson noticed while reviewing this patch that the commit
commit d9e86c0ee60f323e890484628f351bf50fa9a15d Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Nov 10 16:40:20 2010 +0000
drm/i915: Pipelined fencing [infrastructure]
contained a functional change that broke things.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> [jcristau: adjust context for 3.4] Signed-off-by: Julien Cristau <jcristau@debian.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> --- drivers/gpu/drm/i915/i915_gem.c | 1 + 1 file changed, 1 insertion(+)
--- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -928,6 +928,7 @@ i915_gem_pwrite_ioctl(struct drm_device } if (obj->gtt_space && + obj->tiling_mode == I915_TILING_NONE && obj->base.write_domain != I915_GEM_DOMAIN_CPU) { ret = i915_gem_object_pin(obj, 0, true); if (ret)
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