Messages in this thread Patch in this message | | | From | Greg Kroah-Hartman <> | Subject | [ 019/221] ath9k_hw: Enable hw PLL power save for AR9462 | Date | Tue, 15 Jan 2013 10:49:06 -0800 |
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3.7-stable review patch. If anyone has any objections, please let me know.
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From: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
commit 1680260226a8fd2aab590319da83ad8e610da9bd upstream.
This reduced the power consumption to half in full and network sleep.
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Cc: Paul Stewart <pstew@chromium.org> Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- drivers/net/wireless/ath/ath9k/ar9003_hw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c @@ -219,10 +219,10 @@ static void ar9003_hw_init_mode_regs(str /* Awake -> Sleep Setting */ INIT_INI_ARRAY(&ah->iniPcieSerdes, - ar9462_pciephy_pll_on_clkreq_disable_L1_2p0); + ar9462_pciephy_clkreq_disable_L1_2p0); /* Sleep -> Awake Setting */ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, - ar9462_pciephy_pll_on_clkreq_disable_L1_2p0); + ar9462_pciephy_clkreq_disable_L1_2p0); /* Fast clock modal settings */ INIT_INI_ARRAY(&ah->iniModesFastClock,
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