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SubjectRe: [PATCH 7/9] pwm i.MX: fix clock lookup
On Thu, Sep 06, 2012 at 08:31:58PM +0200, Benoît Thébaudeau wrote:
> On Thursday, September 6, 2012 2:48:13 PM, Sascha Hauer wrote:
> >
> > + int ret;
> > +
> > + ret = clk_prepare_enable(imx->clk_ipg);
> > + if (ret)
> > + return ret;
> >
> > - return imx->config(chip, pwm, duty_ns, period_ns);
> > + ret = imx->config(chip, pwm, duty_ns, period_ns);
> > +
> > + clk_disable_unprepare(imx->clk_ipg);
> > +
> > + return ret;
> > }
> >
> > static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device
> > *pwm)
> > @@ -169,7 +179,7 @@ static int imx_pwm_enable(struct pwm_chip *chip,
> > struct pwm_device *pwm)
> > struct imx_chip *imx = to_imx_chip(chip);
> > int ret;
> >
> > - ret = clk_prepare_enable(imx->clk);
> > + ret = clk_prepare_enable(imx->clk_per);
> > if (ret)
> > return ret;
>
> Have you tested that this actually works on i.MX53?
>
> I have tested it successfully on i.MX35 (with a few additions to platform code).
> But i.MX35 has a single bit controlling both PWM IPG and PER clock gates.
>
> On i.MX53, there are 2 separate control bits for these. So, if ipg clk is
> strictly required to access PWM registers, even if per clk is enabled, this code
> should not work without adding

I tested this on i.MX53, but you're right, this seems to be wrong. I'll
recheck tomorrow.

Sascha


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