Messages in this thread | | | Date | Wed, 26 Sep 2012 13:23:30 +0200 | From | Ingo Molnar <> | Subject | Re: [PATCH] UV: fix incorrect tlb flush all issue |
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* Cliff Wickman <cpw@sgi.com> wrote:
> From: Cliff Wickman <cpw@sgi.com> > > (this was sent as an ack on 9/13, but with incorrect title and sign-off) > > Ack. > But with the adjustment below. The 'end' argument was not declared long. > > I tested the patch on a UV. > It has the effect of either clearing 1 or all TLBs in a cpu. > I added some debugging to test for the cases when clearing all TLBs is > overkill, and in practice it happens very seldom. > > Reported-by: Jan Beulich <jbeulich@suse.com> > Signed-off-by: Alex Shi <alex.shi@intel.com> > Signed-off-by: Cliff Wickman <cpw@sgi.com>
If this is still substantially the original patch then I suspect this should be From: Alex Shi, and the small fix you made can be added as:
Signed-off-by: Alex Shi <alex.shi@intel.com> [ fixed the 'end' argument to be declared 'long'. ] Signed-off-by: Cliff Wickman <cpw@sgi.com>
Thanks,
Ingo
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