Messages in this thread | | | Date | Tue, 21 Aug 2012 13:38:02 -0700 | From | David Daney <> | Subject | Re: [2/2] spi: Add SPI master controller for OCTEON SOCs. |
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On 08/21/2012 12:49 PM, Guenter Roeck wrote: > On Fri, May 11, 2012 at 08:34:46PM -0000, David Daney wrote: >> From: David Daney <david.daney@cavium.com> >> >> Add the driver, link it into the kbuild system and provide device tree >> binding documentation. >> >> Signed-off-by: David Daney <david.daney@cavium.com> >> Acked-by: Grant Likely <grant.likely@secretlab.ca> >> > [ ... ] > >> + >> +static int __devexit octeon_spi_remove(struct platform_device *pdev) >> +{ >> + struct octeon_spi *p = platform_get_drvdata(pdev); >> + struct spi_master *master = p->my_master; >> + >> + spi_unregister_master(master); >> + > > I know it is a bit late, but ...
In this case, just in time. I am now finally getting back to fixing the issues with this driver, and looking to merging it in the near future.
David Daney
> > The call to spi_unregister_master() frees the memory associated with master, > ie 'p', and the spi_master_put() below without matching spi_master_get() is > unnecessary/wrong. One possible fix would be to use > > struct spi_master *master = spi_master_get(p->my_master); > > above. That protects master and p while it is still being used, and makes use > of the call to spi_master_put() below. Another option might be to move > cvmx_write_csr() ahead of the call to spi_unregister_master() and drop the > call to spi_master_put(). > > Guenter > >> + /* Clear the CSENA* and put everything in a known state. */ >> + cvmx_write_csr(p->register_base + OCTEON_SPI_CFG, 0); >> + spi_master_put(master); >> + return 0; >> +} >> + >
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