Messages in this thread | | | Date | Thu, 07 Jun 2012 12:01:08 +0800 | From | "Yan, Zheng" <> | Subject | Re: [PATCH] perf: Fix intel shared extra msr allocation |
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On 06/06/2012 06:12 PM, Stephane Eranian wrote: > There is something wrong with this patch, I instrumented the code > and I can see: > [ 1377.324575] 1. idx=1 reg_idx=1 ref=-1 config=0xff01 era->config=0xff01 > ^^^^^^ > The test case on WSM (RSP0, RSP1): > > $ perf stat -a -C13 -e > offcore_response_1:dmnd_data_rd,offcore_response_1:dmnd_data_rd sleep > 100 & > $ perf stat -a -C1 -e offcore_response_1:dmnd_rfo sleep 1 > > I think this happens during scheduling of the events, i.e., during the > run and not on initial > programming. That could happen with cgroups, for instance. > The bug is in intel_fixup_er(), it should be:
static void intel_fixup_er(struct perf_event *event, int idx) { if (idx == EXTRA_REG_RSP_0) { event->hw.config &= ~INTEL_ARCH_EVENT_MASK; event->hw.config |= 0x01b7; event->hw.extra_reg.idx = EXTRA_REG_RSP_0; event->hw.extra_reg.reg = MSR_OFFCORE_RSP_0; } else if (idx == EXTRA_REG_RSP_1) { event->hw.config &= ~INTEL_ARCH_EVENT_MASK; event->hw.config |= 0x01bb; event->hw.extra_reg.idx = EXTRA_REG_RSP_1; event->hw.extra_reg.reg = MSR_OFFCORE_RSP_1; } }
Regards Yan, Zheng
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