Messages in this thread Patch in this message | | | Date | Sun, 17 Jun 2012 19:00:45 +0100 | From | Ben Hutchings <> | Subject | [ 64/69] usb: PS3 EHCI QH read work-around |
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3.2-stable review patch. If anyone has any objections, please let me know.
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From: Geoff Levand <geoff@infradead.org>
commit aaa0ef289afe9186f81e2340114ea413eef0492a upstream.
PS3 EHCI HC errata fix 244. The SCC EHCI HC will not correctly perform QH reads that occur near or span a micro-frame boundry. This is due to a problem in the Nak Count Reload Control logic (EHCI Specification 1.0 Section 4.9.1).
The work-around for this problem is for the HC driver to set I=1 (inactive) for QHs with H=1 (list head).
Signed-off-by: Geoff Levand <geoff@infradead.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Ben Hutchings <ben@decadent.org.uk> --- drivers/usb/host/ehci-hcd.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index e0ca995..9496b7d 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -670,6 +670,7 @@ static int ehci_init(struct usb_hcd *hcd) hw = ehci->async->hw; hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma); hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD); + hw->hw_info1 |= cpu_to_hc32(ehci, (1 << 7)); /* I = 1 */ hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); hw->hw_qtd_next = EHCI_LIST_END(ehci); ehci->async->qh_state = QH_STATE_LINKED;
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