Messages in this thread | | | Date | Thu, 3 May 2012 12:25:03 +0200 | From | Jiri Olsa <> | Subject | Re: [PATCH 02/16] perf: Unified API to record selective sets of arch registers |
| |
On Wed, May 02, 2012 at 04:46:33PM +0200, Stephane Eranian wrote: > On Wed, May 2, 2012 at 2:58 PM, Jiri Olsa <jolsa@redhat.com> wrote: > > > > SNIP > > > >> > > >> > I just sent v3, with changed design to be more generic, please check > >> > > >> > anyway, currently there's no way to mix 32 and 64 bit registers in sample. > >> > > >> > As I mentioned above, once running compat task, 64 bit registers > >> > are stored anyway. Given that all 32 bit registers have 64 equiv. > >> > you can ask to store RAX|RBX|R15. > >> > > >> Well, R8-R15 do not exist in 32-bit mode. So I wonder what is saved > >> on the stack for those, probably nothing. And in that case, how do you > >> handle the case where the user asked for R15 but it is not available and > >> you know that only on PMU interrupt. > > > > right, R8-R15 do not exist in 32 bit mode, meaning that the 32 bit task > > do not use them... but when you enter 64 bit kernel from 32 bit compat > > task, still 64bits registers are saved.. as for native 64 process, > > I am confused by your term '64-bit registers' here. I assume you > mean registers are saved as 64-bit integers. But that does not means > that the full set of 64-bit registers (incl. R8-R15) is saved. Unless same set as for 64 bit tasks.. it's not allways full as I described in previous email
> you're telling > me that whatever values are in those 64-bit ABI only registers are thus saved > on the stack. yep, thats what I see in arch/x86/ia32/ia32entry.S
jirka
| |