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    Subject[ 40/75] x86: Use correct byte-sized register constraint in __xchg_op()
    3.3-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Jeremy Fitzhardinge <jeremy@goop.org>

    commit 2ca052a3710fac208eee690faefdeb8bbd4586a1 upstream.

    x86-64 can access the low half of any register, but i386 can only do
    it with a subset of registers. 'r' causes compilation failures on i386,
    but 'q' expresses the constraint properly.

    Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
    Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org
    Reported-by: Leigh Scott <leigh123linux@googlemail.com>
    Tested-by: Thomas Reitmayr <treitmayr@devbase.at>
    Signed-off-by: H. Peter Anvin <hpa@zytor.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/x86/include/asm/cmpxchg.h | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    --- a/arch/x86/include/asm/cmpxchg.h
    +++ b/arch/x86/include/asm/cmpxchg.h
    @@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
    switch (sizeof(*(ptr))) { \
    case __X86_CASE_B: \
    asm volatile (lock #op "b %b0, %1\n" \
    - : "+r" (__ret), "+m" (*(ptr)) \
    + : "+q" (__ret), "+m" (*(ptr)) \
    : : "memory", "cc"); \
    break; \
    case __X86_CASE_W: \



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