Messages in this thread | | | Date | Tue, 17 Apr 2012 11:25:00 -0500 | From | Scott Wood <> | Subject | Re: [PATCH v4 1/4] powerpc/85xx: add HOTPLUG_CPU support |
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On 04/17/2012 04:51 AM, Li Yang-R58472 wrote: >>> struct smp_ops_t smp_85xx_ops = { >>> .kick_cpu = smp_85xx_kick_cpu, >>> -#ifdef CONFIG_KEXEC >>> +#ifdef CONFIG_HOTPLUG_CPU >>> + .cpu_disable = generic_cpu_disable, >>> + .cpu_die = generic_cpu_die, >>> +#endif >>> .give_timebase = smp_generic_give_timebase, >>> .take_timebase = smp_generic_take_timebase, >>> -#endif >>> }; >> >> We need to stop using smp_generic_give/take_timebase, not expand its use. >> This stuff breaks under hypervisors where timebase can't be written. It >> wasn't too bad before since we generally didn't enable CONFIG_KEXEC, but >> we're more likely to want CONFIG_HOTPLUG_CPU. > > I understand that the guest OS shouldn't change the real timebase.
Cannot change it, and we've seen the tbsync code loop forever when it tries (since the changes aren't taking effect).
> But no matter what timebase syncing method we are using, the timebase need to be changed anyway for certain features.
That's why I said to do it the way U-Boot does it.
> I think the better way should be trapping timebase modification in the hypervisor.
It does trap. Currently we treat it as a no-op. The only reasonable alternative is to give the guest an exception. It is simply not allowed for a guest to modify the timebase -- we are not going to break the host's timebase sync. See the virtualized implementation note in section 9.2.1 of book III-E of Power ISA 2.06B: "In virtualized implementations, TBU and TBL are read-only."
>> Do the timebase sync the way U-Boot does -- if you find the appropriate >> guts node in the device tree. > > That involves stopping timebase for a short time on all cores including the cores that are still online. Won't this be a potential issue?
I don't think it's a big deal in the contexts where you'd be doing this -- at least not worse than the current situation. Just make sure that you don't reset the timebase to zero or otherwise make a core see the timebase go backward.
-Scott
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