Messages in this thread | | | Subject | Re: [PATCH v2] mfd: asic3: Set DS1WM clock_rate | From | Philipp Zabel <> | Date | Tue, 10 Apr 2012 21:22:49 +0200 |
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Am Montag, den 09.04.2012, 13:18 +0100 schrieb Paul Parsons: > The mfd/asic3 driver does not set the ds1wm_driver_data clock_rate field > before passing the structure to the DS1WM w1 busmaster driver. > This was not noticed before commit 26a6afb, because ds1wm_find_divisor() > unintentionally returned the correct divisor when a zero clock_rate was > passed in. However after that commit DS1WM fails a zero clock_rate: > > ds1wm ds1wm: no suitable divisor for 0Hz clock > > This patch sets the ds1wm_driver_data clock_rate field. > > Signed-off-by: Paul Parsons <lost.distance@yahoo.com> > Cc: Philipp Zabel <philipp.zabel@gmail.com> > --- > > V2: > Separated arch/arm/mach-pxa/hx4700.c changes into a separate patch, > to avoid crossing maintainer boundaries. > This patch now submitted to linux-kernel instead of linux-arm-kernel. > Rebased from linux-3.0.1 to linux-3.4-rc2.
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
regards Philipp
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