Messages in this thread | | | From | Chris Wilson <> | Subject | Re: [PATCH 0/8 v7] fix gmbus writes and related issues | Date | Fri, 30 Mar 2012 13:49:17 +0100 |
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On Fri, 30 Mar 2012 19:46:35 +0800, Daniel Kurtz <djkurtz@chromium.org> wrote: > This patchset addresses a couple of issues with the i915 gmbus > implementation. > > v7 adds a final patch to switch to using DRM_ERROR for reporting timeouts. > > Daniel Kurtz (8): > drm/i915/intel_i2c: handle zero-length writes > drm/i915/intel_i2c: use double-buffered writes > drm/i915/intel_i2c: always wait for IDLE before clearing NAK > drm/i915/intel_i2c: use WAIT cycle, not STOP > drm/i915/intel_i2c: use INDEX cycles for i2c read transactions > drm/i915/intel_i2c: reuse GMBUS2 value read in polling loop > drm/i915/intel_i2c: remove POSTING_READ() from gmbus transfers > drm/i915/intel_i2c: use DRM_ERROR on timeouts
The only two I am still dubious about is 4/8: use WAIT cycle, not STOP, and 8/8: use DRM_ERROR on timeouts, the rest are Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
The last is a little debatable, as i2c can be called from userspace (and other modules) and we have not verified that the adapters we set up correspond to devices conditions. So I think it is still possible under normal conditions to hit the error path, so would prefer to keep the log level as INFO. -Chris
-- Chris Wilson, Intel Open Source Technology Centre
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