Messages in this thread | | | Date | Tue, 13 Mar 2012 15:58:15 -0700 | Subject | Re: x2APIC and many-APIC systems... | From | Yinghai Lu <> |
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On Tue, Mar 13, 2012 at 2:29 AM, Daniel J Blueman <daniel@numascale-asia.com> wrote: > Ingo, Suresh, > > Commit a35fd28256e7736cc84af8931a16224f0bfaaf6c prevents x2APIC structures > being used from the ACPI MADT if the cores don't advertise the x2APIC > feature. Commit c284b42abadbb22083bfde24d308899c08d44ffa prevents onlining > cores with APIC ID >255 in non-x2APIC mode. Since NumaChip/NumaConnect uses > x2APIC structures to describe non-x2APIC systems (AMD Opteron) with lots of > APICs, we thus now can't boot all the cores. > > We are able to set the x2APIC bit in the processor feature flags, so get > caught by the second patch. Is there an appropriate approach to use in these > circumstances? Otherwise, would a patch that separates the APIC ID handover > and future x2APIC MSR access be appropriate? >
add is_apicid_valid() in struct apic?
Yinghai
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