Messages in this thread | | | Date | Mon, 17 Dec 2012 10:44:03 +0100 | From | Robert Richter <> | Subject | Re: [PATCH 1/1] Change IBS PMU to use perf_hw_context |
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On 16.12.12 10:04:10, Ingo Molnar wrote: > > * suravee.suthikulpanit@amd.com <suravee.suthikulpanit@amd.com> wrote: > > > From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> > > > > Currently, the AMD IBS PMU initialize pmu.task_ctx_nr to > > perf_invalid_context which only allows IBS to be running only > > in system-wide mode (e.g. perf record -a). IBS hardware is > > available in each core and should be per-context. This patch > > modifies the task_ctx_nr to use the perf_hw_context (default) > > instead. > > I'm wondering how extensively was it tested/verified that it's > safe to enable IBS in per context mode as well, and that the > profiling results are precise and accurate?
From the implementation's point of view this is very similar to hw perf counters. I wouldn't expect any issues here. Since IBS can be immediatly started/stopped and there is no caching, there won't be any incomming sample that is not related to that context.
The only potential problem I see could be a security risk in a way that an IBS sample might expose data related to other contexts such as cache information. This is similar to uncore/northbridge events so I don't think this is an issue, but we might want to evaluate this.
> We never used the IBS hardware in this fashion before, so some > extra care is prudent - and traces of that extra care should be > visible in the changelog as well.
Yeah, a comparison of numbers for IBS and hw counter (-e r076:p,r076 and -e r0C1:p,r0C1) in per-context mode would be useful here.
-Robert
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