Messages in this thread | | | Date | Fri, 30 Nov 2012 16:50:39 +0200 | From | Eli Billauer <> | Subject | Re: [PATCH 2/2] New driver: Xillybus generic interface for FPGA (programmable logic) |
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Thanks for the remarks.
I'm sending the updated patches in a minute. Basically, I divided the module into three (one core, one for PCIe and one for OF) and made several corrections.
On 11/28/2012 06:57 PM, Greg KH wrote: > What is the user/kernel interface for this driver? Is it documented > anywhere? > There's a rather extensive documentation for download at the site. The docs for the host side mostly instruct common UNIX programming techniques: The device files are just data pipes to FIFOs in the FPGA, behaving like one would expect. >> +#if (PAGE_SIZE< 4096) >> +#error Your processor architecture has a page size smaller than 4096 >> +#endif >> > That can never happen. Even if it does, you don't care about that in > the driver. > > I removed this check because it can't happen. But the driver *does* care about this, since it creates a lot of buffers with different alignments, hence depending on the pages' alignment. > >> +static struct class *xillybus_class; >> > Why not just use the misc interface instead of your own class? > When Xillybus is used, the whole system's mission is usually around it (e.g. it's a computer doing data acquisition through the Xillybus pipes). So giving it a high profile makes sense, I believe. Besides, a dozen of device files are not rare.
Regards, Eli
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