Messages in this thread | | | Date | Sun, 07 Aug 2011 22:53:32 -0700 (PDT) | Subject | Re: [PATCH 1/2] gianfar: fix fiper alignment after resetting the time | From | David Miller <> |
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From: Richard Cochran <richardcochran@gmail.com> Date: Sun, 7 Aug 2011 09:03:03 +0200
> After resetting the time, the PPS signals on the FIPER output channels > are incorrectly offset from the clock time, as can be readily verified > by a looping back the FIPER to the external time stamp input. > > Despite its name, setting the "Fiper Realignment Disable" bit seems to > fix the problem, at least on the P2020. > > Also, following the example code from the Freescale BSP, it is not really > necessary to disable and re-enable the timer in order to reprogram the > FIPER. (The documentation is rather unclear on this point. It seems that > writing to the alarm register also disables the FIPER.) > > Signed-off-by: Richard Cochran <richard.cochran@omicron.at> > Cc: <stable@kernel.org>
Applied.
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