Messages in this thread | | | Date | Fri, 05 Aug 2011 10:10:29 -0700 | From | "H. Peter Anvin" <> | Subject | Re: [PATCH -v3.1 0/3] x86, AMD: Correct F15h IC aliasing issue |
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On 08/05/2011 06:15 AM, Borislav Petkov wrote: > From: Borislav Petkov <borislav.petkov@amd.com> > > Hi, > > a small refinement of the patchset from yesterday per hpa's comments: > > * put mask and flags into a single cacheline and make it __read_mostly > > * change alignment computation back to clearing bits [14:12] so that a > mask of 0x0 can have no effect on the address. > > Please take a look and apply, if no objections. >
Patch 1 looks good now.
Patch 2 I'm going to object to because it puts your run_on_bsp method into a different structure where all the existing methods for this already are in a way that looks totally gratuitous to me. Why not just have a c_bsp_init on struct cpu_dev like all the other methods?
-hpa
-- H. Peter Anvin, Intel Open Source Technology Center I work for Intel. I don't speak on their behalf.
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