Messages in this thread | | | Subject | Re: [PATCHv2 6/9] perf: expose perf capability to other modules. | From | Peter Zijlstra <> | Date | Mon, 07 Nov 2011 15:07:50 +0100 |
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On Thu, 2011-11-03 at 14:33 +0200, Gleb Natapov wrote: > @@ -1580,6 +1580,8 @@ __init int intel_pmu_init(void) > x86_pmu.num_counters = eax.split.num_counters; > x86_pmu.cntval_bits = eax.split.bit_width; > x86_pmu.cntval_mask = (1ULL << eax.split.bit_width) - 1; > + x86_pmu.events_mask = ebx; > + x86_pmu.events_mask_len = eax.split.mask_length; > > /* > * Quirk: v2 perfmon does not report fixed-purpose events, so > @@ -1651,6 +1653,7 @@ __init int intel_pmu_init(void) > * architectural event which is often completely bogus: > */ > intel_perfmon_event_map[PERF_COUNT_HW_BRANCH_MISSES] = 0x7f89; > + x86_pmu.events_mask &= ~0x40; > > pr_cont("erratum AAJ80 worked around, "); > }
It might make sense to introduce cpuid10_ebx or so, also I think the removal of the branch-miss-retired event is either unwanted or incomplete. As seen software already expects that bit to be set, even though its known broken.
At the very least add a full ebx iteration to disable unsupported events in the intel-v1 case.
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