Messages in this thread | | | Date | Fri, 11 Nov 2011 09:59:30 -0800 | From | Jesse Barnes <> | Subject | Re: [PATCH -v2 00/16] PCI: Re-factor PCI's 'latency timer' setup |
| |
On Fri, 28 Oct 2011 15:47:26 -0600 Myron Stowe <myron.stowe@redhat.com> wrote:
> The 'latency timer' of PCI devices, both Type 0 and Type 1, > is setup in architecture-specific code [see: pcibios_set_master()]. > There are two approaches being taken by all the architectures - check > if the 'latency timer' is currently set between 16 and 255 and if not > bring it within bounds, or, do nothing (and then there is the > gratuitously different parisc implementation). > > There is nothing architecture-specific about PCI's 'latency timer' so > this patch pulls the setup functionality up into the PCI core by > creating a generic 'pcibios_set_master()' function using the '__weak' > attribute which can be used by all architectures as a default which, > if necessary, can then be over-ridden by architecture-specific code.
I have acks from Chris, Ralf, and Mike. Any other arch maintainers want to ack or nack this before it goes into my -next branch?
Thanks, -- Jesse Barnes, Intel Open Source Technology Center [unhandled content-type:application/pgp-signature] | |