Messages in this thread | ![/](/images/icornerl.gif) | | Date | Mon, 15 Nov 2010 08:16:57 -0600 (CST) | From | Christoph Lameter <> | Subject | Re: [PATCH] atomic: add atomic_inc_not_zero_hint() |
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On Mon, 15 Nov 2010, Andi Kleen wrote:
> > It is another way to get an exclusive cache line > > for situations like this. No need to give a hint. > > prefetchw doesn't work on Intel (or rather is equivalent to prefetch), > for Intel you always need to explicitely write to get an exclusive > line.
Argh. You mean x86. Itanium could do it and is also by Intel. Could you please change that for x86 as well? Otherwise we will get more of these weird code twisters.
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