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SubjectRe: [PATCH 1/2] perf-events: Add support for supplementary event registers v2
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On Sat, Nov 13, 2010 at 11:32 AM, Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> On Sat, 2010-11-13 at 11:13 +0100, Andi Kleen wrote:
>> > Hrmm,. this doesn't really scale right wrt multiple extra_regs.
>> >
>> > You made the extra_regs thing fairly extensible, but the above doesn't
>> > really work well if there's multiple extra regs (say OFFCORE and
>> > LBR_CONFIG -- possibly even the two OFFCORE regs present on westmere).
>> >
>> > It basically needs a per-core state for each extra_reg possible.
>>
>> It shouldn't be too hard to extend it to use a table. I didn't want
>> to do that for the first iteration. I guess it could be done as followons
>> once LBR is implemented.
>
> Isn't it also relevant for the two offcore regs for wsm?
>
But that's two distinct events (0xbb and 0xb7), though they behave
exactly the same and have the same set of umasks and extra MSR
values.


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