Messages in this thread | ![/](/images/icornerl.gif) | | Date | Fri, 12 Nov 2010 11:52:19 +0100 | Subject | Re: [PATCH 2/3] perf: Add support for extra parameters for raw events | From | Stephane Eranian <> |
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On Fri, Nov 12, 2010 at 11:48 AM, Andi Kleen <andi@firstfloor.org> wrote: >> I don't think you need special syntax. You can simply come up with >> the 64-bit raw hex value. corey recently added a small utility to do >> this via libpfm4: perf stat -e `evt2raw unhalted_core_cycles:u` .... > > I added a small patch to perf to read event mappings from a flat mapping file. > >> > Also, I think we can use the same mechanism to program the >> > PEBS-load-latency MSR, right? >> > >> Yes, we could hardcode the latency the same way. > > At least right now it would still need a constraint, because only > one counter can use it. >
True. But there are already contraint tables for PEBS. For instance, if I use INST_RETIRED (0x3c) with PEBS, then it cannot use a fixed counter. So you can do a constraint for MEM_LOAD_RETIRED:LAT_ABOVE_THRES the same way (include the umask).
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