Messages in this thread | | | Date | Tue, 22 Sep 2009 17:41:57 +0200 | From | Ingo Molnar <> | Subject | Re: [boot crash] Re: [tip:x86/mce3] x86, mce: use 64bit machine check code on 32bit |
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* Andi Kleen <ak@linux.intel.com> wrote:
> Ingo Molnar wrote: >> * Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> wrote: >> >>> One possibility is: if the BIOS doesn't clear status in banks, new >>> mce codes will try to log such junks. If the junk is totally junk >>> but can be decoded as a valid log with MISCV or ADDRV bit, and if >>> the cpu try to access register which is not implemented (e.g. >>> IA32_MCi_MISC/ADDR), then such access might cause a general >>> protection exception. (ref. ASDM 3A 15.3.2.3) >> >> btw., that reminds me: mce_rdmsrl() needs to be fixed to use >> rdmsrl_safe() and it should emit a WARN_ONCE() if it ever hits an >> error while trying to access registers. > > In general systems (like VMs) who don't have MCA MSRs don't declare > the capability bits (there are own capability bits for all of this) > and then the MSRs are never touched. So far I've not had a single > report of this going wrong.
Your sloppiness of not fixing mce_rdmsrl() as i requested brought us this new boot crash regression in 2.6.31, in mce_rdmsrl():
http://bugzilla.kernel.org/show_bug.cgi?id=14204
[ 0.010016] mce: CPU supports 5 MCE banks [ 0.011029] general protection fault: 0000 [#1] [ 0.011998] last sysfs file: [ 0.011998] Modules linked in: [ 0.011998] [ 0.011998] Pid: 0, comm: swapper Not tainted (2.6.31_router #1) HP Vectra [ 0.011998] EIP: 0060:[<c100d9b9>] EFLAGS: 00010246 CPU: 0 [ 0.011998] EIP is at mce_rdmsrl+0x19/0x60
Here's the deal: from now on i'm not going to take any new MCE patches from you unless they are Acked-by Hidetoshi-san or Huang Ying - who in the past few months has shown far greater care than you in approaching MCE matters.
Your carelessness and your stubborn refusal to learn from past mistakes is mind-boggling.
Ingo
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