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SubjectRe: [PATCH v3 1/2] ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size
On Sat, Sep 12, 2009 at 11:48:30PM +0300, Kirill A. Shutemov wrote:
> Currently kernel believes that all ARM CPUs have L1_CACHE_SHIFT == 5.
> It's not true at least for CPUs based on Cortex-A8.

Please send this to the patch system. There's no need to add the "V2"
comments to it when you do.


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