Messages in this thread | | | Date | Mon, 17 Aug 2009 16:27:29 -0700 | From | Stephen Hemminger <> | Subject | Re: clocksource changes in 2.6.31 - possible regression |
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On Mon, 17 Aug 2009 16:17:54 -0700 john stultz <johnstul@us.ibm.com> wrote:
> On Mon, 2009-08-17 at 16:02 -0700, Stephen Hemminger wrote: > > On Mon, 17 Aug 2009 15:23:22 -0700 > > john stultz <johnstul@us.ibm.com> wrote: > > > > > On Mon, 2009-08-17 at 14:45 -0700, Stephen Hemminger wrote: > > > > On Mon, 17 Aug 2009 14:37:57 -0700 > > > > john stultz <johnstul@us.ibm.com> wrote: > > > > > However, I think its fair, that as your TSC is being disqualified for > > > > > being an old AMD SMP box, and there is a *possibility* that if you don't > > > > > run with cpufreq and the SUMA-ness of the box didn't get in the way of > > > > > TSC synchronization, you might have an argument for overriding the > > > > > unsynchronized_tsc() heuristics. > > > > > > > > > > Luckily the option is already there. :) > > > > > > > > > > So try booting with "tsc=reliable" to override those checks, and I think > > > > > you'll be able to do what you want to do. > > > > > > > > > > > > > Good idea, doesn't work. > > > > > > > > vyatta@amd1:~$ cat /proc/cmdline > > > > BOOT_IMAGE=/boot/vmlinuz-2.6.31-rc6 root=/dev/sda1 ro tsc=reliable > > > > vyatta@amd1:~$ cat /sys/devices/system/clocksource/clocksource0/available_clocksource > > > > acpi_pm > > > > > > Bah! My apologies for half-assing this. > > > > > > How about with the following *tested* patch (includes a variant of > > > Thomas' fix). > > > > > > thanks > > > -john > > > > > > > > > Signed-off-by: John Stultz <johnstul@us.ibm.com> > > > > > > diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c > > > index 71f4368..648fb26 100644 > > > --- a/arch/x86/kernel/tsc.c > > > +++ b/arch/x86/kernel/tsc.c > > > @@ -825,6 +825,9 @@ __cpuinit int unsynchronized_tsc(void) > > > > > > if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) > > > return 0; > > > + > > > + if (tsc_clocksource_reliable) > > > + return 0; > > > /* > > > * Intel systems are normally all synchronized. > > > * Exceptions must mark TSC as unstable: > > > @@ -832,10 +835,10 @@ __cpuinit int unsynchronized_tsc(void) > > > if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) { > > > /* assume multi socket systems are not synchronized: */ > > > if (num_possible_cpus() > 1) > > > - tsc_unstable = 1; > > > + return 1; > > > } > > > > > > - return tsc_unstable; > > > + return 0; > > > } > > > > > > static void __init init_tsc_clocksource(void) > > > > > > > > > > This adds tsc, but makes it first? it is reliable, but do I want > > to make it most important? > > > > $ cat /sys/devices/system/clocksource/clocksource0/available_clocksource > > tsc acpi_pm > > > Well, if you're overriding the system saying that its safe, then sure, > its better then anything else, why wouldn't we? >
That's acceptable, maybe add change to Documentation/kernel-parameters.txt
tsc= Disable clocksource-must-verify flag for TSC. Format: <string> [x86] reliable: mark tsc clocksource as reliable and makes tsc the default clocksource; this disables clocksource verification at runtime. Used to enable high-resolution timer mode on older hardware, and in virtualized environment.
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