Messages in this thread | | | Date | Mon, 29 Sep 2008 23:34:51 -0700 | From | "Yinghai Lu" <> | Subject | Re: [PATCH] x86: do not allow to optimize flag_is_changeable_p() |
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On Mon, Sep 29, 2008 at 11:14 PM, Jeremy Fitzhardinge <jeremy@goop.org> wrote: > Krzysztof Helt wrote: >> From: Krzysztof Helt <krzysztof.h1@wp.pl> >> >> The flag_is_changeable_p() is used by >> has_cpuid_p() which can return different results >> in the code sequence below: >> >> if (!have_cpuid_p()) >> identify_cpu_without_cpuid(c); >> >> /* cyrix could have cpuid enabled via c_identify()*/ >> if (!have_cpuid_p()) >> return; >> >> Otherwise, the gcc 3.4.6 optimizes these two calls >> into one which make the code not working correctly. >> Cyrix cpus have the CPUID instruction enabled but >> it is not detected due to the gcc optimization. >> Thus the ARR registers (mtrr like) are not detected >> on such a cpu. >> > > If "asm volatile" changes the code and fixes the bug, it seems like > you're making use of an undocumented - or at least non-portable - behaviour. > > Does adding a "memory" clobber also fix the problem? That would have > better defined characteristics. >
how about
if (!have_cpuid_p()) { identify_cpu_without_cpuid(c);
/* cyrix could have cpuid enabled via c_identify()*/ if (!have_cpuid_p()) return; }
YH
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