Messages in this thread | | | From | (Eric W. Biederman) | Date | Wed, 24 Sep 2008 02:54:16 -0700 | Subject | Re: Should irq_chip->mask disable percpu interrupts to all cpus, or just to this cpu? |
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Ingo Molnar <mingo@elte.hu> writes:
> * Jeremy Fitzhardinge <jeremy@goop.org> wrote: > >> Hi, >> >> I'm reworking Xen's interrupt handling to isolate it a bit from the >> workings of the apic-based code, as Eric suggested a while back. >> >> As I've mentioned before, Xen represents interrupts as event channels. >> There are two major classes of event channels: per-cpu and, erm, not >> percpu. Per-cpu event channels are for things like timers and IPI >> function calls which are inherently per-cpu; it's meaningless to >> consider, for example, migrating them from cpu to cpu. I guess >> they're analogous to the the local apic vectors. >> >> (Non-percpu event channels can be bound to a particular cpu, and >> rebound at will; I'm not worried about them here.) >> >> Previously I allocated an irq per percpu event channel per cpu. This >> was pretty wasteful, since I need about 5-6 of them per cpu, so the >> number of interrupts increases quite quickly as cpus does. There's no >> deep problem with that, but it gets fairly ugly in /proc/interrupts, >> and there's some tricky corners to manage in suspend/resume.
Every high performance device wants one irq per cpu. So if it gets ugly in /proc/interrupts we should look at fixing /proc/interrupts.
It looked like in Xen each of those interrupts were delivered to different event channels. Did I misread that code?
I really hate the notion of sharing a single irq_desc across multiple cpus as a preferred mode of operation. As NUMA comes into play it guarantees we will have cross cpu memory fetches on a fast path for irq handling.
Other than the beautiful way we print things in /proc/interrupts IRQ_PER_CPU feels like a really bad idea. Especially in that it enshrines the nasty per cpu irq counters that scale horribly.
Eric
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