Messages in this thread | | | Date | Tue, 05 Aug 2008 01:55:45 +0400 | From | Sergei Shtylyov <> | Subject | Re: Kernel Summit request for Discussion of future of ATA (libata) and IDE |
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Hello.
Alan Cox wrote: >> I was looking into the 32-bit PIO issue a bit yesterday. It looks like >> some of the VLB libata drivers are doing this internally already, so it >> shouldn't be hard to do this in the core. Only question is how we know >> generically if the controller can do it or not? It looks like in old >> > > You don't. Basically it is controller dependant. Pretty much all the > newer controllers support the 32bit PIO data cycles. Most PCI controllers > it makes no speed difference but host bus controllers (especially > PIIX/ICH) really benefit. >
In what way if there's no speed gain?
>> supported. I couldn't track down where that bit was actually defined in >> the first place, all the way back to ATA-1 it seems to be indicated as >> reserved. Actually, I'm not sure why the drive cares in the first place, >> it would seem like a pure host controller issue.. >> > > It goes back before IDE into the depths of the original compaq spec. When > you have a device wired basically directly to the ISA bus (original IDE) >
ISA has only 8/16-bit data bus, so it could not have mattered there... and I don't think that there ever was a direct connection between the IDE and host bus other than ISA... except maybe EISA.
MBR, Sergei
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